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ZU+ Example - Typical Power States

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5. Run Linux and RPU app
5. 1. Boot Linux using petalinux-boot
petalinux-boot --jtag --kernel
Note:
As per CR-973961, JTAG cannot run when cpuidle is on. So run script (zcu102.tcl) on xsdb to load petalinux images:
Load Images
xsdb% source zcu102.tcl
xsdb%
Boot Linux on APU using SD Card by coping BOOT.BIN and image.ub on the SD Card.
Once above script execution is done,boot start U-boot prompt
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on serial. Press Enter again and again to interrupt u-boot till ZynqMP prompt appear. Run below
ZynqMP > setenv bootargs ${bootargs} cpuidle.off=1
5.2. Run RPU app
If XSDB method is used to start linux, this step should be skipped.
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(RPU application Application source) (rpu_deep_sleep.elf) when Linux is upup)
{rpu_deep_sleep.elf}
Perform following command on xsdb

ZU+ Example - Typical Power States

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source <petalinux-install-dir>/settings.sh
petalinux-create -t project -s /proj/petalinux/petalinux-v2017.3_bsps_daily_latest/xilinx-zcu102-v2017.3-final.bsp
x-Petalinux on APU-Configure petalinux to use hdf generated from Vivado design
2. Apply Linux kernel patch to signal wakeup
Create directory <plnx-proj-root>/project-spec/meta-user/recipes-kernel/linux/files/ (if not present)
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RPU0: Go to deep sleep
After 10 seconds RPU gets timer interrupt after that it suspend itself and goes to deep sleep mode for 10 seconds.
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to deep sleep,Usesleep, Use Power Advantage
Following are two print messages to identify these 10 second window.
RPU0: Go to deep sleep
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RPU0: Wakeup Latency in useconds of Node NODE_APU_0: Latency for power state transition from "Suspend to RAM" to "3 APU off (min frequency).
Related Links
Title 1 & Link 1
Title 1 & Link 1
http://www.wiki.xilinx.com/Zynq+UltraScale%EF%BC%8B+MPSoC+Power+Advantage+Tool+2017.1
http://www.wiki.xilinx.com/PetaLinux+Getting+Started
http://www.wiki.xilinx.com/How+to+format+SD+card+for+SD+boot

1. Create petalinux project

ZU+ Example - Typical Power States

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Create directory <plnx-proj-root>/project-spec/meta-user/recipes-kernel/linux/files/ (if not present)
Copy patch file to <plnx-proj-root>/project-spec/meta-user/recipes-kernel/linux/files/ (Patch attached here: pm_wakeup_latency.patch)
{pm_wakeup_latency.patch}
Open <plnx-proj-root>/project-spec/meta-user/recipes-kernel/linux/linux-xlnx_%.bbappend (create if not present)
Add below line in file:

Zynq UltraScale+ MPSoC Ubuntu part 2 - Building and Running the Ubuntu Desktop From Sources:

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Coud you sent me the original URL of the Ubuntu rootfs?

Qspipsu Standalone driver

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Performance Details
Single
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throughput is 8701326 KBPS
Qspipsu
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throughput is 755528339 KBPS
Dual-Parallel
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throughput is 17002438 KBPS
Qspipsu
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throughput is 1493354245 KBPS
Change Log
2016.3

Qspips Standalone driver

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QSPIPS FLASH Interrupt Example Test
Successfully ran QSPIPS FLASH Interrupt Example Test
Performance Details
Performance Details-SingleSingle
Qspips write throughput is 362 KBPS
Qspips read throughput is 27675 KBPS
Performance Details-Dual-ParallelDual-Parallel
Qspips write throughput is 644 KBPS
Qspips read throughput is 33573 KBPS

Change Log
2016.3

Zynq UltraScale+ MPSoC Ubuntu part 2 - Building and Running the Ubuntu Desktop From Sources:

Zynq UltraScale+ MPSoC Ubuntu part 2 - Building and Running the Ubuntu Desktop From Sources:


ZCU102 Image creation in OSL flow

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export CROSS_COMPILE=aarch64-linux-gnu-
export ARCH=aarch64
make xilinx_zynqmp_zcu102_rev1.0_defconfigxilinx_zynqmp_zcu102_rev1_0_defconfig
git clone https://git.kernel.org/pub/scm/utils/dtc/dtc.git
cd dtc

MicroBlaze-Baremetal

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Device DriverBaremetal Drivers and Libraries Documentation

Embedded SW Support

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Creation of custom recipes
Custom build scripts for PetaLinux
Open Source User Space Applications
Yocto
Xilinx uses Yocto eSDK build system within our PetaLinux product which is the exclusive extent to which we test Yocto. Xilinx does provide Yocto recipes for all key components but we do not test these outside of the PetaLinux tools context. It is incumbent on our customers to address any issues between their own in-house Yocto build system and the Yocto recipes provided by Xilinx.

XEN Hypervisor

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{Xen3_27Mar.JPG} Two Linux DomU + one Bare-Metal Application
{Xen4_27Mar.JPG} Three Linux DomU
UsingSystem Feature Summary
The table below lists system features that are now available under native Linux (no hypervisor), Linux Dom0 (on Xen), and Linux DomU (on Xen).
Feature
Native Linux
Linux Dom0
Linux DomU
Notes
Power Management – various functions
Yes
Not Yet Planned
Not Yet Planned
Some functionality included in Xen
Not fully featured or tested
See Xen sources
FPGA_manager (write once)
Yes
Yes
Not Yet Planned
See: FPGA Manager
FPGA_manager (write multiple)
2018.1
2018.1
Not Yet Planned
Partial Reconfiguration
Not Yet Planned
Not Yet Planned
Not Yet Planned
RPU life cycle management
Yes
Not Yet Planned
Not Yet Planned
OpenAMP comms APU/RPU
Yes
2018.1 (libmetal)
2018.1 (libmetal)
Shared memory DomU to DomU
N/A
2018.1
2018.1
See: Xen Hypervisor Internals
GPU Usage
Yes
Not Yet Planned
Not Yet Planned
PL IP Usage
Yes
Yes under any of
the following conditions:
SMMU disabled (for PL accesses)
Only one guest using PL
Each AXI port dedicated to single guest
Yes under any of the following conditions:
SMMU disabled (for PL accesses)
Only one guest using PL
Each AXI port dedicated to single guest
See: Xen and PL Masters
Using
Xen Hypervisor with 2017.3Xilinx Releases
2017.3

Building the Xen Hypervisor with PetaLinux 2017.3
General information for configuring and Building Linux Dom0
General information for configuring and Building Linux DomU
Building a EL1 baremetal DomU guest with Xilinx SDK
Using the Xen Hypervisor with 2017.1/2017.22017.1/2017.2
Building the Xen Hypervisor with PetaLinux 2017.1
General information for configuring and Building Linux Dom0
General information for configuring and Building Linux DomU
Building a EL1 baremetal DomU guest with Xilinx SDK
Using the Xen Hypervisor with 2016.4 tools2016.4
Building the Xen Hypervisor with PetaLinux 2016.4
Buildling the Xen Hypervisor with Xilnx's Yocto Flow
Using the Xen Hypervisor with 2016.3 tools2016.3
Building the Xen Hypervisor with PetaLinux 2016.3
Xen Details
Xen and PL Masters
Xen Hypervisor Internals
You can use FPGA Manager to load an FPGA bitstream onto the PL from Dom0. Follow the standard Linux instructions here: http://www.wiki.xilinx.com/FPGA+Manager+ZCU102 for details on loading the bitstream. This will only work from Dom0.

Additional Commercial Support and Professional Services
Xilinx recommends DornerWorks , one of our Premier partners to those who desire support beyond the topics and scope described above, for customization or optimization of one of the many elements of a full Xen-based solution including new DomU OS support, frontend drivers, and for optimization for performance, DMA, or boot time.

XEN Hypervisor

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{Xen3_27Mar.JPG} Two Linux DomU + one Bare-Metal Application
{Xen4_27Mar.JPG} Three Linux DomU
SystemXen-Based System Feature Summary
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(on Xen).
Feature
Native Linux
...
Not Yet Planned
Some functionality included in Xen
...
or tested
See Xen sources
FPGA_manager (write once)
...
PL IP Usage
Yes
...
following conditions:
SMMU disabled (for PL accesses)
Only one guest using PL
Each AXI port dedicated to single guest
...
following conditions:
SMMU disabled (for PL accesses)
Only one guest using PL

XEN Hypervisor

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Each AXI port dedicated to single guest
See: Xen and PL Masters
Additional PL IP planned for 2018.1 should mitigate key challenges.
Using Xen Hypervisor with Xilinx Releases
2017.3

XEN Hypervisor

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See: Xen and PL Masters
Additional PL IP planned for 2018.1 should mitigate key challenges.
Warm Reset/Restart
Yes - under explicit use-cases
Not Yet Planned
Not Yet Planned

Using Xen Hypervisor with Xilinx Releases
2017.3

XEN Hypervisor

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2018.1
See: Xen Hypervisor Internals
Xen Shared memory
GPU Usage
Yes
...
Yes
Yes under any of the following conditions:
SMMU disabled (for PL accesses)
Only one guest using PL
Each AXI port dedicated to single guest
Yes under any of the following conditions:
SMMU disabled (for PL accesses)
Only one guest using PL
Each AXI port dedicated to single guest

XEN Hypervisor

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Yes
Yes under any of the following conditions:
Only one guest using PL
Each AXI port dedicated
master IP communicating with guest
PL master IPs directed
to a single guest must use guest-dedicated AXI port(s)
Yes under any of the following conditions:
Only one guest using PL
Each AXI port dedicated
master IP communicating with guest
PL master IPs directed
to a single guest must use guest-dedicated AXI port(s)
See: Xen and PL Masters
Additional PL IP planned for 2018.1 should mitigate key challenges.

XEN Hypervisor

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Power Management – various functions
Yes
Not Yet Planned
Not Yet Planned
Roadmap
Roadmap

Some functionality included in Xen
Not fully featured or tested
...
Yes
Yes
Not Yet PlannedRoadmap
See: FPGA Manager
FPGA_manager (write multiple)
2018.1
2018.1
Not Yet PlannedRoadmap
Partial Reconfiguration
Not Yet Planned
Not Yet Planned
Not Yet Planned
Roadmap
Roadmap

RPU life cycle management
Yes
Not Yet Planned
Not Yet Planned
Roadmap
Roadmap

OpenAMP comms APU/RPU
Yes
2018.1 (libmetal)
2018.1 (libmetal)
Shared device memory DomU
N/A
2018.1
...
See: Xen Hypervisor Internals
Xen Shared memory
Shared cacheable memory DomU to DomU
N/A
Roadmap
Roadmap

GPU Usage
Yes
Not Yet Planned
Not Yet Planned
Roadmap
Roadmap

PL IP Usage
Yes
...
Warm Reset/Restart
Yes - under explicit use-cases
Not Yet Planned
Not Yet Planned
Roadmap
Roadmap

Using Xen Hypervisor with Xilinx Releases
2017.3

XEN Hypervisor

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Roadmap
Partial Reconfiguration
Not Yet PlannedRoadmap
Roadmap
Roadmap

XEN Hypervisor

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Overview
Xen is an opensourcea type-1 Hypervisor which isdefined, maintained and provided to the open source community by the Xen Project. Xilinx actively contributes code to the Xen Project to provide Zynq UltraScale+ MPSoC platform support as well as key enhancements which benefit Xilinx customer use-cases.
Xen
allows users to run multiple instances of operating systemssystem(s) or baremetal codebare-metal applications to execute on a single host. For moreZ US+ MPSoC. Additional information on what the Xen hypervisor is have a lookcan be found at the projects overiew here: Xen Project Software Overview
Since
page.
Xilinx provides within
the 2017.1 release, Xilinx has support customers who deploy combinations of LinuxPetaLinux Tools and Xilinx bare-metal application guestsalso on Xen hypervisor. Information linked below will be very helpful as you work to configure, buildour GIT, core elements and deployexample designs that enable a software solution consistingbasic usage of Xen hypervisor + Linux Dom0 + Linux DomU + bare-metal guests.
Based on
system configurations across the recurring need for our customers to optimize performanceprocessing cores of their bare-metal guests, our material currently focuses on configurations with "CPU Pinning", where physical CPU cores are dedicated to guest OS, and Z US+ MPSoC devices are dedicated for exclusive use by a guest.
The
MPSoC.
The
diagrams and information below represent some of the many possibleis intended to assist our customers to configure, build and deploy these basic configurations enabled throughand to also identify current functionality gaps which may need to be further addressed within the links provided below.customer's final system architecture.
{Xen1_27Mar.JPG} One Linux DomU + two Bare-Metal Applications
{Xen2_27Mar.JPG} Linux Dom0 with custom apps + three Bare-Metal Applications
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{Xen4_27Mar.JPG} Three Linux DomU
Xen-Based System Feature Summary
TheXilinx provides basic reference designs which include fundamental, core capabilities for Xen-based systems. The table below lists what some consider to be important system features that are now availableand their status under native
Feature
Native Linux
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