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Zynq 2018.2 Release

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More details about configuring, building and running U-Boot are located on the U-Boot and Build U-Boot pages.
Linux
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on a 4.94.14 Linux kernel
More details about configuring, building and running Linux are located on the Linux, Zynq Linux and Build Kernel pages.
Device-tree Generator

Zynq 2018.2 Release

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The First Stage Boot Loader (FSBL) used to generate the boot.bin file is based on the 2018.2 release of the Xilinx tools.
U-Boot
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based on a v2018.01 U-Boot 2018.2 created from
More details about configuring, building and running U-Boot are located on the U-Boot and Build U-Boot pages.
Linux

Zynq UltraScale MPSoC Base TRD 2018.1

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1920x1080 (5fps), 1280x720 (10fps)
YUYV
Note: The Logitech C525 webcam takes about 12 seconds to start after selection from the GUI. It will start streaming once the LED is lit.
DisplayPort Cables:
Cable Matters DisplayPort Cable-E342987

Zynq UltraScale MPSoC Base TRD 2018.2

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1920x1080 (5fps), 1280x720 (10fps)
YUYV
Note: The Logitech C525 webcam takes about 12 seconds to start after selection from the GUI. It will start streaming once the LED is lit.
DisplayPort Cables:
Cable Matters DisplayPort Cable-E342987

Zynq 2018.2 Release

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The First Stage Boot Loader (FSBL) used to generate the boot.bin file is based on the 2018.2 release of the Xilinx tools.
U-Boot
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on a v2018.01v2018.2 U-Boot created
More details about configuring, building and running U-Boot are located on the U-Boot and Build U-Boot pages.
Linux

Zynq 2018.2 Release

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The First Stage Boot Loader (FSBL) used to generate the boot.bin file is based on the 2018.2 release of the Xilinx tools.
U-Boot
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on a v2018.2v2018.01 U-Boot created
More details about configuring, building and running U-Boot are located on the U-Boot and Build U-Boot pages.
Linux

Zynq UltraScale MPSoC VCU TRD 2018.1 - Design Module 3

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1.killall -9 modetest
2.launch the modetest by running source /media/card/autostart.sh from command line
For 1080p60 monitor, replace modetest command in /media/card/autostart.sh with the below command.
modetest -M xlnx -s 36:1920x1080-60@YUYV -w 36:sdi_mode:2 -w 36:sdi_data_stream:2 -w 36:is_frac:0 &

NOTE: The SD card file system is mounted at /media/card. Optional storage medium SATA and USB are mounted at /media/sata and /media/usb respectively.
1.3.1 GStreamer Application (vcu_gst_app)

Linux Drivers

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drivers/iio/adc/xilinx-xadc
System Monitor
ZynqMPZynq Ultrascale+ MPSoC
ZynqMP AMS
No
...
drivers/misc/xilinx_trafgen.c
CAN Controller
Zynq
axi_can
, axi_can
Zynq Ultrascale+ MPSoC
LinuxCAN Driver
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drivers/dma/pl330.c
DMA Controller
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Zynq/Zynq Ultrascale+ MPSoc/MicroblazeMPSoc
and Microblaze

IP: axi_dma
DMA drivers
Yes
drivers/dma/xilinx/xilinx_dma.c
AXI DMA driver is mainlined and is available from v4.8 kernel
DMA Controller
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Zynq/Zynq Ultrascale+ MPSoc/MicroblazeMPSoc
and Microblaze

IP: axi_cdma
DMA drivers
Yes
drivers/dma/xilinx/xilinx_dma.c
AXI CDMA driver is mainlined and is available from v4.8 kernel
DMA Controller
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Zynq/Zynq Ultrascale+ MPSOC/MicroblaseMPSOC
and Microblase

IP: axi_vdma
DMA drivers
Yes
drivers/dma/xilinx/xilinx_dma.c
AXI VDMA driver is mainlined and is available from v3.16 kernel
DMA Controller
Platform: Zynq Ultrascale+ MPSOC
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Yes
drivers/dma/xilinx/zynqmp_dma.c
ZYNQMP DMA driver is mainlined and is available in the 4.8 kernel
DMA Controller
Platform: Zynq Ultrascale+ MPSOC
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Zynq Ultrascale+ MPSoC
DRM KMS Driver
ZynqMP DIsplayPortDisplayPort driver
No
drivers/gpu/drm/xilinx/*
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drivers/net/ethernet/cadence/macb.c
Ethernet MAC
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Zynq/Zynq Ultrascale+ MPSOC/MicroblazeMPSoC
and Microblaze

IP: axi_ethernet, legacy 10G MAC
Axi Ethernet Driver
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Uses AXI DMA and AXI MCDMA
Ethernetlite
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Zynq/Zynq Ultrascale+ MPSOC/MicroblazeMPSoC
and Microblaze

IP: axi_ethernetlite
EmacLite Driver
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2018.1 hdmi-modules
HDMI PHY
Xilinx® VideoVideo PHY Controller
Xilinx Phy VideoPhy Driver
No
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SoC revision read mechanism
Zynq Ultrascale+ MPSoC
ZynqMP SoCSoC revision read
No
drivers/nvmem/zynqmp_nvmem.c
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Yes
drivers/pci/host/pcie-xilinx.c
Zynq AXI PCIe driver is mainlined and is available in kernel v3.18.
PCIe
Zynq Ultrascale+ MPSoC
ZynqMP Linux PCIePCIe Root Port
Yes
drivers/pci/host/pci-xilinx-nwl.c
PL PCIe
Zynq Ultrascale+ MPSoC
ZynqMP Linux PLPL PCIe Root Port Driver
No
drivers/pci/host/pcie-xdma-pl.c
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Reset-Controller
Zynq Ultrascale+ MPSoC
Zynqmp Linux Reset-controllerReset-controller Driver
No
drivers/reset/reset-zynqmp.c
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No
No
drivers/media/platform/xilinx/xilinx-vipp.c +
and
xilinx-vip.c +and xilinx-dma.c
drivers/media/platform/xilinx/xilinx-cfa.c
drivers/media/platform/xilinx/xilinx-cresample.c
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rfdc
No
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/rfdc/XilinxProcessorIPLib/drivers/rfdc
Linux user space driver
Related Links

Baremetal Drivers and Libraries

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DMA
axicdma
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI CDMA Standalone Driver
axicdma
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DMA
axidma
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI DMA Standalone Driver
axidma
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DMA
mcdma
ZynqMPZynq UltraScale+ MPSoC
AXI MCDMA Standalone Driver
mcdma
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Networking
axiethernet
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI Ethernet Standalone Driver
axiethernet
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PCIe
axipcie
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
To be updated
axipcie
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Monitor
axipmon
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI PM standalone driver
axipmon
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DMA
axivdma
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI VDMA Standalone Driver
axivdma
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I2C
iic
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI-I2C standalone driver
axii2c
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Memory
bram
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
BRAM Standalone driver
axibram
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Networking
emaclite
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
Emaclite Standalone Driver
emaclite
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I/O
gpio
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI gpio standalone driver
gpio
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I/O
iomodule
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
To be updated
iomodule
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FIFO
llfifo
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
FIFO Standalone Driver
llfifo
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IPC
mutex
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
Mutex Standalone Driver
mutex
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IPC
mailbox
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
Mailbox Standalone Driver
mailbox
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Timer
wdttb
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI Watchdog Timer standalone driver
wdttb
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Usb
usb
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
To be updated
usb
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Serial
uartlite
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI UART Lite standalone driver
uartlite
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Serial
uartns
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI UART 16550 standalone driver
uartns550
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Performance
trafgen
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
Axi traffic generator standalone driver
trafgen
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Performance
tpg
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
To be updated
tpg
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Timer
tmrctr
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
AXI TIMER Standalone Driver
tmrctr
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IO
axitft
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
To be updated
tft
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IO
srio
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
To be updated
srio
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Memory
mig_7series
MicroblazeMicroBlaze
To be updated
mig_7series
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Networking
can
Zynq, ZynqMP, MicroblazeZynq UltraScale+ MPSoC, MicroBlaze
To be updated
can
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Networking
canps
Zynq, ZynqMPZynq UltraScale+ MPSoC
CAN PS Standalone Driver
canps
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I/O
gpiops
Zynq, ZynqMPZynq UltraScale+ MPSoC
Gpio-PS standalone driver
gpiops
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Clock
rtcpsu
ZynqMPZynq UltraScale+ MPSoC
RTC standalone driver
rtcpsu
...
Timer
wdtps
Zynq, ZynqMPZynq UltraScale+ MPSoC
Watchdog Timer standalone driver
wdtps
...
Nand
nandpsu
zynqMPZynq UltraScale+ MPSoC
Nandpsu standalone driver
nandpsu
...
Nand
nandps
zynqZynq
Nandps standalone driver
nandps
...
DMA
dmaps
zynqZynq
PL330 standalone driver
dmaps
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DMA
zdma
zynqMPZynq UltraScale+ MPSoC
ZynqMP Dma standalone driver
zdma
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DMA
csudma
zynqMPZynq UltraScale+ MPSoC
CSUDMA standalone driver
csudma
...
Usb
usbps
zynqZynq
Zynq standalone usb device driver
usbps
...
Usb
usbpsu
zynqMPZynq UltraScale+ MPSoC
ZynqMp usb stadalone driver
usbpsu
...
Networking
emacps
Zynq, ZynqMPZynq UltraScale+ MPSoC
Ethernet standalone driver
emacps
...
SPI
spi
Zynq, ZynqMP, MicroblazeZynq,Zynq UltraScale+ MPSoC, MicroBlaze
spi
GQSPI controller
SPI
qspipsu
ZynqMPZynq UltraScale+ MPSoC
Qspipsu standalone driver
qspipsu
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SPI
spips
Zynq, ZynqMPZynq UltraScale+ MPSoC
Spipsu standalone driver
spips
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Serial
uartps
Zynq, ZynqMpZynq UltraScale+ MPSoC
UART standalone driver
uartps
...
I2C
iicps
Zynq, ZynqMpZynq UltraScale+ MPSoC
I2CPS standalone driver
i2cps
...
SD
sdps
ZynqMPZynq UltraScale+ MPSoC
SDPS standalone driver
sdps
...
Timer
ttcps
Zynq, ZynqMPZynq UltraScale+ MPSoC
TTC standalone driver
ttcps
...
GIC
scugic
Zynq, ZynqMPZynq UltraScale+ MPSoC
GIC standalone driver
gic
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Sysmon
sysmonpsu
ZynqMPZynq UltraScale+ MPSoC
Sysmonpsu standalone driver
sysmonpsu
...
DisplayPort Controller
dppsu
ZynqMPZynq UltraScale+ MPSoC
ZynqMp DisplayPort Subsystem
dppsu
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Video
avbuf
ZynqMPZynq UltraScale+ MPSoC
ZynqMp DisplayPort Subsystem
avbuf
...
DMA
dpdma
ZynqMPZynq UltraScale+ MPSoC
ZynqMp DisplayPort Subsystem
dpdma
...
usp data converter
rfdc
ZynqMPZynq UltraScale+ RFSoC
RFdc Standalone driver
rfdc
...
Network TCP/IP stack
emacps, axiethernet
zynq, zynqmp, microblazeZynq,Zynq UltraScale+ MPSoC, MicroBlaze
LWIP library
lwip
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Flash
spips, qspips, qspipsu, axi qspi
zynq, zynqmp, microblazeZynq,Zynq UltraScale+ MPSoC, MicroBlaze
xilisf library
xilisf
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bsp
cortex-A9, cortex-A53, cortex-R5 processors
zynq, zynqmpZynq,Zynq UltraScale+ MPSoC, MicroBlaze
Standalone BSP
standalone bsp
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FAT File System
sdps
Zynq and ZynqMPZynq,Zynq UltraScale+ MPSoC
xilffs library
xilffs
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Bitstream loading
csudma
zynqMPZynq UltraScale+ MPSoC
Xilfpga library
xilfpga
...
security
AES, RSA, SHA2/SHA3
ZynqMPZynq,Zynq UltraScale+ MPSoC
xilsecure
xilsecure
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security
RSA, SHA2
zynqZynq
xilrsa library
xilrsa

Understanding MEMDATA flow and how to manually create MMI file

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Introduction:
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know the over BRAM block
So in this article, we shall discuss how this flow works, and how to manually create the files needed if this flow breaks, or if a user design falls outside the supported flows within IP Integrator.
Memdata Metadata:

Understanding MEMDATA flow and how to manually create MMI file

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Introduction:
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know the overall BRAM block size and thesize, BRAM location,
So in this article, we shall discuss how this flow works, and how to manually create the files needed if this flow breaks, or if a user design falls outside the supported flows within IP Integrator.
Memdata Metadata:

Understanding MEMDATA flow and how to manually create MMI file

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Introduction:
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BRAM block size,size and the BRAM location,
So in this article, we shall discuss how this flow works, and how to manually create the files needed if this flow breaks, or if a user design falls outside the supported flows within IP Integrator.
Memdata Metadata:

Baremetal Drivers and Libraries

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To be updated
tft
Serial rpidIORapidIO
IO
srio
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CSUDMA standalone driver
csudma
Synopsys DRDUSB 2.0 Synopsys DRD controller
Usb
usbps
...
Zynq standalone usb device driver
usbps
Synopsys DRDUSB 3.0 Synopsys DRD controller
Usb
usbpsu

Debugging RFDC Linux Application in SDK

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cd rfdc_image
petalinux-config --get-hw-description=<path to HDF>
copy the contents of the meta-petalinux/recipes-bsp to rfdc_image/project-spec/meta-user/recipes-bsp
petalinux-build -c rfdc
petalinux-build

FSBL

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FSBL can only be run from A53_0 (AArch32 and AArch64), R5_0, R5_Lockstep
What part of OCM is used by FSBL
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hands off. FSBL fully uses this OCM region and, in fact, in certain designs and when certain features need to enabled, the current footprint of FSBL doesn't fit in this available OCM. For details, search for "footprint" in this wiki.
ATF starts at 0xFFFEA000.uses the rest of OCM i.e. from 0xFFFEA000 to 0xFFFFFFFF. Please note
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implementation of APU onlyAPU-only restart assumes
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actually restarting.
Hence, OCM is completely used between FSBL and ATF and with the available APU-only restart mechanism, no other application can reuse it.

How is xfsbl_translation_table.S different from translation_table.S of BSP
xfsbl_translation_table.S is a copy of file translation_table.S (of A53). The difference is that the FSBL’s copy of this file marks DDR region as reserved. This is to avoid speculative access to DDR before it is initialized. Once the DDR initialization is done in FSBL, memory attributes for DDR region is changed to “Memory” so that it is cacheable.
...
Yes
FSBL_PROT_BYPASS_EXCLUDE_VAL
(0U)
FSBL shall bypass
(1U)
By default (from 2018.1), complete XMPU/XPPU configuration is done. Changing this flag will result in FSBL bypassing
XPPU and
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XMPU configuration BY DEFAULT and isolation/protection feature iswill be just limited
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OCM slave. Changing this flag will result in complete XMPU/XPPU configuration, but the corresponding support in sofware is not complete, hence this shouldn't be selected.
NOTE: If the Isolation Configuration check box is not selected in PCW, this flag has no significance.

No
FSBL_PARTITION_LOAD_EXCLUDE_VAL
...
(0U)
By default FSBL forces encryption of all the partitions when ENC_ONLY bit is blown, but if this macro is been set encryption can be optional for all the partitions loaded by FSBL, however it is compulsory for FSBL partition.
...
which FSBL foot printfootprint can be
Debug prints: By default only FSBL banner is printed. If more debug prints are enabled, these will result in use of more memory.
Drivers Asserts: Asserts are used within all Xilinx drivers and can be turned off on a system-wide basis by defining, at compile time, the NDEBUG identifier (adding –DNDEBUG against extra_compiler_flags of drivers). This will help further reduce FSBL footprint.

Embedded SW Support

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Xilinx provided binaries
Optimizations/customizations
Application Notes and Example Designs
Xilinx Application Notes are provided as-is and only the specific conditions and scenarios described in the application note are supported.
Exact conditions specified in application note
Porting application notes to different versions
Modifications to the design in any way

Screenshot-Board Support Package Settings .png

Screenshot-Board Support Package Settings -1.png

Screenshot-Board Support Package Settings -1.png

PMU Firmware

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Click Next and select "Hello World" template application. Click Finish.
Right click on the application BSP and select "Board Support Package Settings". BSP settings window appears as below. Select "xilpm" library and click on "Ok"
{BSP_Settings.png}{Screenshot-Board Support Package Settings -1.png}
Now the BSP and application will get regenerated with xilpm library.
Now configuration object is generated as part of xilpm library. To verify the same, please check bsp -> psu_cortexa53_0 -> libsrc -> xilpm_v2_2 -> pm_cfg_obj.c
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