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Zynq Base TRD 2014.4

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The Sobel filter IP core used in the Zynq Base TRD was generated using this approach.
Pre-generated Sobel IP core is available at $ZYNQ_TRD_HOME/hardware/vivado/srcs/ip/xilinx_com_hls_image_filter_1_0/
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Vivado IP, in Command prompt, execute commandnavigate to $ZYNQ_TRD_HOME/hardware/vivado_hls/sobel and run:
bash>
vivado_hls -f script.tclrun.tcl
The IP is located in the directory $ZYNQ_TRD_HOME/hardware/vivado_hls/prj/solution1/impl/ip/xilinx_com_hls_sobel_filter_1_0.zip
To use this IP and generate bitstream, replace the content of $ZYNQ_TRD_HOME/hardware/vivado/src/ip/xilinx_com_hls_image_filter_v1_0/ by content of the zip file generated by Vivado HLS tool.
And follow the steps in section 3.1 'Generating the bitstream'
To open the generated project in GUI mode, run:
bash> vivado_hls -p prj
{vivado_hls.jpg}

5 Petalinux
5.1 Installation of Petalinux SDK

ExtractedBSPfolders.PNG

PrebuiltBootFiles.PNG

Zynq-7000 AP SoC Spectrum Analyzer part 6 - AMS - XADC Signal Acquisition and DMA to L2 Cache & Complete Design Tech Tip 2014.3

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At this point, we are done with Vivado and it can be closed. Save the project for future reference if prompted.
Important! Tag this page with: techtip-Building the Softwarex-Building the SoftwareBuilding the Software
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the software developed in an earlier Tech Tip in this series to move
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steps; building a new boot filesfile that includeincludes the hardware and interrupt service software infor the base PetaLinux systemXADC block and then
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Building the boot files:BOOT.BIN file:
For this
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XADC block. For compatibility withTherefore, the other Tech Tips in this series, modificationsonly boot file that needs to be built is the base PetaLinux system are included. No specific action byBOOT.BIN as it contains the user is required at this time.
Because we previously added an interface to
bitstream which has the new hardware system fromin the user application and using interrupts,PL. In the device tree structure (dts) that isprevious Tech Tip "Zynq-7000 AP SoC Spectrum Analyzer part 6 - Accelerating Software - Accelerating an FFT with ACP Coprocessor Tech Tip 2014.3" the PetaLinux SDK was used to describebuild both the system to the kernel at boot time must be modified. Information on how user space device drivers operateBOOT.BIN and their basic implementationimage.ub files. For this Tech Tip, we can be founduse Vivado SDK because we are not building the slide set "Linux User Space Device Drivers" located inimage.ub file. Since we are only changing the Xilinx forums. Other resources such as the PetaLinux Tools Reference Guide describe various aspects of both modificationbitstream portion of the dts as well as importing new hardware and building newBOOT.BIN, we will use a first stage boot loader (fsbl) and u-boot.elf files used by the PetaLinux system for the ZC702.
We assume that
same operation.
The base TRD for
the ZC702 that utilizes PetaLinux SDK has been installed on an appropriate Linux system. See section 5 ofis described in the technical article Zynq Base TRD 2014.2 forFollow the instructions on installingfound there to download the PetaLinux system.software from the Xilinx web site. Unzip the set of files to a convenient place on your computer. In addition, be sure that Qtour case, we put them in our "Projects" folder:
G:\Projects\rdf0286-zc702-zvik-base-trd-2014-2
If we look inside this folder, we can see a variety of files but a fsbl
and Qwt are properly installed according to the Qt and Qwt Base Libraries Build Instructions. If Qt and Qwtu-boot.elf are not properly installed,readily apparent. However, there is a large file with the buildextension of .bsp that is in the boot files will failpetalinux folder. Normally this is used to run properly for either the TRD or other graphics applications.
Start by creating
set up a new project (UG1124 page 21).
We then import
within the hardware description from Vivado into PetaLinux development environment. For our use, we are going to configureextract the needed boot files from this project. Recall that.bsp file.
G:\Projects\rdf0286-zc702-zvik-base-trd-2014-2\software\petalinux\bsp\Xilinx-zc702-trd-v2014_2.bsp
While
we exportedcould extract the hardware from Vivado, saving itcontents at the current location, to be sure we do not disturb the file system_top_wrapper.hdf.
NOTE:
As
integrity of the 2014.2 release, Vivado exportsTRD, we simply copy the hardware description in.bsp file to another location. Once that is done, change the hdf (hardware description file) whereas previous versions exportedextension to .tar (this file is really a XML file. Similarly, PetaLinux now expectscompressed Linux compatible file). Then we can use a standard tool to import"un-compress" the hdf format only.
Follow
file, resulting in the instructions on page 23following set of UG1124 to importfolders withing the hardwareextracted archive.
{ExtractedBSPfolders.PNG}
If we then drill
into the just created project.
Follow
pre-built folder to linux and then images, we can find the instructions in section 5following set of files
{PrebuiltBootFiles.PNG}
From within SDK, we will simply use
the Zynq Base TRD 2014.2 for re-building the PetaLinux systemnow readily visible zynq_fsbl.elf and creatingu-boot.elf files along with the new boot.bin and image.ub files. Be surebitstream to usebuild the bitstream and hdf file created by Vivado for the design that includes the hardware FFT block and associated control logic.required new BOOT.BIN file.
The new bootBOOT.BIN file now
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and FFT blocks and accompanying DMA engines as well as ablocks. At this point we have not modified device tree blobthe PetaLinux system that enables interruptsgets loaded from the DMA blockimage.ub file so there is no need to be servicedmodify it. The application built in user space within Linux.the following section will simply be invoked as an application running on the PetaLinux after it has booted.
Important! Tag this page with: techtip-Building the Software-Building the Application:Building the Application:
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the new boot files, and the dts modified to include interrupts from the DMA enginesBOOT.BIN file we can
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with the hardware using interrupts.hardware.
List all the steps to run the design. This includes hardware, software and tools needed.
Expected Results

Zynq-7000 AP SoC - Using BRAM for Additional On-Chip Memory Tech Tip

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Zynq-7000 AP SoC - AMP Solution without External Memory Tech Tip

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QSPI Flash Programming Follow the following procedure to program QSPI flash
Make sure that the hardware board is set up is done properly.
Note: RefertoUG873,Refer to UG873, Zynq-7000 All
Change the SW16 switch setting as shown below
{Figure6_DAMP.JPG} Figure 6: Switch selections for SD boot.

skylar-home

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Skylar Home
Welcome to the Xilinx Wiki!
The purpose of the wiki is to provide you with the tools you need to complete projects and tasks which use Xilinx products. We are committed to working with communities to contribute high quality code in our publicly available GIT repositories.
Linux made easy
The PetaLinux Software Development Kit is a complete embedded Linux distribution and development environment that contains everything necessary to build, develop, test and deploy Embedded Linux systems on Xilinx hardware. PetaLinux includes pre-configured binary bootable images, fully customizable Linux for Xilinx devices, tools to automate the configuration, build and deployment process, Board Support Packages and Development Tools (host). For more information, see the PetaLinux wiki pages.
Look at the Getting Started page and the Quick Start Guide.
Linux
The Xilinx Linux project is a customized non-commercial Linux distribution catered towards development on Zynq AP SoC and MicroBlaze. Developers new to Linux may wish to consider commercial Linux solutions instead.
Zynq AP SoC
Release Images
Build Kernel
Build and Modify a Rootfs
Build Device Tree Blob
Qemu
MicroBlaze
Build Kernel
Other Linux Resources
Installing and Using Git
Installing the Xilinx Tools
Linux Drivers
Other Resources
Zynq AP SoC
Zynq All Programmable SoCs (AP SoC) are processor-centric platforms that offer software, hardware and I/O programmability in a single chip.
Getting Started
Installing the Xilinx Tools
Building U-Boot for Zynq AP SoC
Building the Linux Kernel for Zynq AP SoC
Linux Support
Release Images
Design Examples
Zynq-7000 AP SoC Solutions Center
Zynq Power Management
Boards and Kits
Targeted Reference Designs (TRD)
Multi-OS Support (AMP & Hypervisor)
LTTng for Zynq Linux
ZC702 Benchmarks
Other Zynq AP SoC Resources
MicroBlaze
MicroBlaze™ is the Xilinx FPGA-based, 32- bit RISC Harvard architecture soft processor. It supports advanced architecture options such as AXI interface, Memory Management Unit (MMU), instruction and data-side cache, configurable pipeline depth and Floating-Point unit (FPU). The soft processor core is included with the Xilinx software tools.
Getting Started
Installing the Xilinx Tools
Building U-Boot for MicroBlaze
Building the Linux Kernel for MicroBlaze
Targeted Reference Designs (TRD)
Other MicroBlaze Resources
Join the Community: Access our Git servers & Submit Patches
We encourage our customers to share their code; see Create and Submit a Patch to contibute your code. We are working on sending all of the code we develop upstream.You can access the code we develop by visiting our Git server:https://github.com/xilinx which is managed by Git (http://git-scm.com/).
Please help us improve the depth and quality of information on this wiki. We encourage you to add and edit these pages. You may provide us feedback by sending email to wiki-help@xilinx.com
Technical Support
Linux on the Zynq™ All Programmable SoC is supported by Xilinx Technical Support for Xilinx provided customizations. Similarly, "Tech Tips” on the Wiki are supported for the specific configurations and scenarios as provided. Any modifications made are not supported.
All other content, including Open Source Linux on MicroBlaze™ and PowerPC® is not supported through Xilinx Technical Support, and is provided as-is. Please feel free to post your questions on the Xilinx embedded forums .

Zynq Power Management

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Due to dependencies between the CPU frequency and timers, the range of valid frequencies is limited/frequency changes may fail (see: https://github.com/Xilinx/linux-xlnx/commit/356cbded4131b067ec5fa4430c15c2fac867fa2b)
cpufreq statistics don't work
System clock runs slower proportionately to the difference between the default clock rate and that set by cpufreq if a timer other than the TTC (e.g. arm_global_timer) is used as clocksource
cpuidle
The cpuidle framework manages CPU idle levels. Full documentation is found in Documentation/cpuidle/.

Zynq-7000 AP SoC Spectrum Analyzer part 1 - Accelerating Software & More - Installing and Running the Spectrum Analyzer Demo Tech Tip 2014.3

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CAUTION !! This Page is Under Construction
Important! Tag this page with: techtip

Document History
Date

skylar-home

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The PetaLinux Software Development Kit is a complete embedded Linux distribution and development environment that contains everything necessary to build, develop, test and deploy Embedded Linux systems on Xilinx hardware. PetaLinux includes pre-configured binary bootable images, fully customizable Linux for Xilinx devices, tools to automate the configuration, build and deployment process, Board Support Packages and Development Tools (host). For more information, see the PetaLinux wiki pages.
Look at the Getting Started page and the Quick Start Guide.
LinuxLinux, OS, Hypervisors & Boot
The Xilinx Linux project is a customized non-commercial Linux distribution catered towards development on Zynq AP SoC and MicroBlaze. Developers new to Linux may wish to consider commercial Linux solutions instead.
Zynq AP SoC
...
Linux Drivers
Other Resources
ZynqZynq-7000 AP SoC
Zynq

Zynq-7000
All Programmable
Getting Started
Installing the Xilinx Tools
...
Targeted Reference Designs (TRD)
Other MicroBlaze Resources
Zynq UltraScale MPSoC
The UltraScale™ Multi-Processing System on Chip (MPSoC) Architecture built on TSMC’s 16nm FinFET process technology, enables Next Generation 16nm Zynq® UltraScale MPSoCs.
Coming Soon

Join the Community: Access our Git servers & Submit Patches
We encourage our customers to share their code; see Create and Submit a Patch to contibute your code. We are working on sending all of the code we develop upstream.You can access the code we develop by visiting our Git server:https://github.com/xilinx which is managed by Git (http://git-scm.com/).

skylar-home

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The PetaLinux Software Development Kit is a complete embedded Linux distribution and development environment that contains everything necessary to build, develop, test and deploy Embedded Linux systems on Xilinx hardware. PetaLinux includes pre-configured binary bootable images, fully customizable Linux for Xilinx devices, tools to automate the configuration, build and deployment process, Board Support Packages and Development Tools (host). For more information, see the PetaLinux wiki pages.
Look at the Getting Started page and the Quick Start Guide.
Zynq-7000 AP SoC
Zynq-7000 All Programmable SoCs (AP SoC) are processor-centric platforms that offer software, hardware and I/O programmability in a single chip.
Getting Started
Demonstrations & Board and Kits
Development & Debug
Boot & Config
Operating Systems
Power Management
Performance & Benchmarks
Software Acceleration
Real-Time & Data Movement
Peripherals & Drivers
Security & Safety
Zynq UltraScale MPSoC
The UltraScale™ Multi-Processing System on Chip (MPSoC) Architecture built on TSMC’s 16nm FinFET process technology, enables Next Generation 16nm Zynq® UltraScale MPSoCs.
Coming Soon

Linux, OS, Hypervisors & Boot
The Xilinx Linux project is a customized non-commercial Linux distribution catered towards development on Zynq AP SoC and MicroBlaze. Developers new to Linux may wish to consider commercial Linux solutions instead.
...
Linux Drivers
Other Resources
Zynq-7000 AP SoC
Zynq-7000 All Programmable SoCs (AP SoC) are processor-centric platforms that offer software, hardware and I/O programmability in a single chip.
Getting Started
Installing the Xilinx Tools
Building U-Boot for Zynq AP SoC
Building the Linux Kernel for Zynq AP SoC
Linux Support
Release Images
Design Examples
Zynq-7000 AP SoC Solutions Center
Zynq Power Management
Boards and Kits
Targeted Reference Designs (TRD)
Multi-OS Support (AMP & Hypervisor)
LTTng for Zynq Linux
ZC702 Benchmarks
Other Zynq AP SoC Resources

MicroBlaze
MicroBlaze™ is the Xilinx FPGA-based, 32- bit RISC Harvard architecture soft processor. It supports advanced architecture options such as AXI interface, Memory Management Unit (MMU), instruction and data-side cache, configurable pipeline depth and Floating-Point unit (FPU). The soft processor core is included with the Xilinx software tools.
...
Targeted Reference Designs (TRD)
Other MicroBlaze Resources
Zynq UltraScale MPSoC
The UltraScale™ Multi-Processing System on Chip (MPSoC) Architecture built on TSMC’s 16nm FinFET process technology, enables Next Generation 16nm Zynq® UltraScale MPSoCs.
Coming Soon

Join the Community: Access our Git servers & Submit Patches
We encourage our customers to share their code; see Create and Submit a Patch to contibute your code. We are working on sending all of the code we develop upstream.You can access the code we develop by visiting our Git server:https://github.com/xilinx which is managed by Git (http://git-scm.com/).

skylar-home

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Zynq-7000 AP SoC Spectrum Analyzer part 5 - Accelerating Software - Accelerating an FFT with ACP Coprocessor Tech Tip 2014.3

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skylar-home

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Welcome to the Xilinx Wiki!
The purpose of the wiki is to provide you with the tools you need to complete projects and tasks which use Xilinx products. We are committed to working with communities to contribute high quality code in our publicly available GIT repositories.
Linux made easy
The PetaLinux Software Development Kit is a complete embedded Linux distribution and development environment that contains everything necessary to build, develop, test and deploy Embedded Linux systems on Xilinx hardware. PetaLinux includes pre-configured binary bootable images, fully customizable Linux for Xilinx devices, tools to automate the configuration, build and deployment process, Board Support Packages and Development Tools (host). For more information, see the PetaLinux wiki pages.

Look at the Getting Started page and the Quick Start Guide.
Zynq-7000 AP SoC
...
Build Device Tree Blob
Qemu
MicroBlaze
Build Kernel

Other Linux Resources
Installing and Using Git

skylar-home

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XADCinfoInPlace.PNG

CreateBootImageBlank.PNG

CreateBootImageBIFset.PNG

AddPartitionfsbl.PNG

BootImageFilesReady.PNG

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