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Nandpsu standalone driver

September 28, 2016, 12:31 am
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- Source - Driver source files
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Features Supported
Controller Features Supported:
The following features are supported inFeatures:
Complies with the Ronaldo NAND Standalone driver.
PolledONFI 3.1 specification
Supports interleaving operations
Supports BCH error correction code (ECC) data widths of 4, 8, 12, and Interrupt mode24 bits.
All ONFI 3.1 commands
PIO and MDMA support
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and NVDDR mods
8-bitmodes
supports only 8-bit bus support
Hardware ECC (Hamming code and BCH)
Page size up to 16K
Programmable timing modes
64-bit dma support.
Supported ONFI 3.1 Commands:
The Ronaldo NAND Standalone driver implements basic functionality like PAGE_READ, PAGE_PROGRAM and BLOCK_ERASE. These commands are required
Supports multiple chip selects (up to read2)
Driver Features:
Supports only the data from NAND flash and write the data into the NAND flash. Apart from these commands, the driver also supports commands which are used to initialize the NAND flash and also to check the status of flash periodically.
The following list ofmandatory ONFI 3.1 commands are supported by the Standalone driver:
Reset
Read Status
Read ID
Read Paramater Page
Read Page
Program Page
Erase Block
Set Features
Getcommands. i.e Reset, Read status, Read ID, Read Parameter Page, Read Page, Program Page, Erase Block, Set/Get Features
Supports SDR/DDR modes
Supports timing modes 0-5
Supports PIO and MDMA support
Support for multiple chip selection
Support BBT management
Bad Block management
Bad block management implementation is same as Linux MTD bad block management with the exception of reserving number of blocks to store Bad Block Table (BBT) from default 4 blocks to 64 blocks. This is because one of the Micron flash part MT29F32G08ABCDB has last 32 blocks as bad most of the times. Since it was difficult to store bad block table in last 4 blocks, the number of blocks are increased to 64 blocks.
Interoperability
Known issues and Limitations
Driver supports polled mode only
No support for interleaved and all optional ONFI 3.1 commands
Test cases
Nandpsu example:
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/nandpsu/examples/xnandpsu_example.c
It verifies the nand data integrity by programing the known data pattern and verify the same by reading the data back.
In this process erase, program, read, read ID, Read Parameter Page, Reset, read status, get/set features and bbt management are covered
Output:code Xilinx Zynq MP First Stage Boot Loader Release 2016.3 Sep 27 2016 - 00:23:11 Nand Flash Read Write Example Test Manufacturer: MICRON MT29F32G08ABCDBJ4 , Device Model: MT29F32G08ABCDBJ4 , Jedec ID: 0x2C Bytes Per Page: 0x4000 Spare Bytes Per Page: 0x4C0 Pages Per Block: 0x100 Blocks Per LUN: 0x418 Number of LUNs: 0x1 Number of bits per cell: 0x1 Number of ECC bits: 0xFF Block Size: 0x400000 Number of Target Blocks: 0x418 Number of Target Pages: 0x41800 ECC: addr 0x4220 size 0x2A0 numbits 24 codesz 10 XNandPsu_ReadBbt: Bad block table found Successfully ran Nand Flash Read Write Example Test code
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Nandpsu standalone driver

September 28, 2016, 12:33 am
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It verifies the nand data integrity by programing the known data pattern and verify the same by reading the data back.
In this process erase, program, read, read ID, Read Parameter Page, Reset, read status, get/set features and bbt management are covered
Output:code XilinxOutput:
Xilinx Zynq MP
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Boot Loader Release
Release 2016.3 Sep
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- 00:23:11 Nand
Nand Flash Read
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Example Test Manufacturer:
Manufacturer: MICRON MT29F32G08ABCDBJ4 , Device
Device Model: MT29F32G08ABCDBJ4 , Jedec
Jedec ID: 0x2C Bytes
Bytes Per Page: 0x4000 Spare
Spare Bytes Per Page: 0x4C0 Pages
Pages Per Block: 0x100 Blocks
Blocks Per LUN: 0x418 Number
Number of LUNs: 0x1 Number
Number of bits
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cell: 0x1 Number
Number of ECC bits: 0xFF Block
Block Size: 0x400000 Number
Number of Target Blocks: 0x418 Number
Number of Target Pages: 0x41800 ECC:
ECC: addr 0x4220
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codesz 10 XNandPsu_ReadBbt:
XNandPsu_ReadBbt: Bad block table found Successfully
Successfully ran Nand
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Example Test code
Related Links
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Nandps standalone driver

September 28, 2016, 12:36 am
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Introduction
This page gives an overview of nandps driver which is available as part of the Xilinx Vivado and SDK distribution.
Source path for the driver:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/nandps
Driver source code is organized into different folders. Below diagram shows the nandpsu driver source organization
nandpsu
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-- Doc - Provides the API and data structure details
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- Examples - Reference application to show how to use the driver APIs and calling sequence
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- Source - Driver source files
Features Supported
Controller Features:
Complies with the ONFI 1.0 specification
Supports interleaving operations
Supports BCH error correction code (ECC) data widths of 4, 8, 12, and 24 bits.
All ONFI 3.1 commands
PIO and MDMA support
SDR and NVDDR modes
supports only 8-bit bus support
Hardware ECC (Hamming code and BCH)
Page size up to 16K
Programmable timing modes
64-bit dma support.
Supports multiple chip selects (up to 2)
Driver Features:
Supports only the mandatory ONFI 3.1 commands. i.e Reset, Read status, Read ID, Read Parameter Page, Read Page, Program Page, Erase Block, Set/Get Features
Supports SDR/DDR modes
Supports timing modes 0-5
Supports PIO and MDMA support
Support for multiple chip selection
Support BBT management
Bad Block management
Bad block management implementation is same as Linux MTD bad block management with the exception of reserving number of blocks to store Bad Block Table (BBT) from default 4 blocks to 64 blocks. This is because one of the Micron flash part MT29F32G08ABCDB has last 32 blocks as bad most of the times. Since it was difficult to store bad block table in last 4 blocks, the number of blocks are increased to 64 blocks.
Known issues and Limitations
Driver supports polled mode only
No support for interleaved and all optional ONFI 3.1 commands
Test cases
Nandps example:
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/nandpsu/examples/xnandpsu_example.c
It verifies the nand data integrity by programing the known data pattern and verify the same by reading the data back.
In this process erase, program, read, read ID, Read Parameter Page, Reset, read status, get/set features and bbt management are covered
Output:
Xilinx Zynq MP First Stage Boot Loader
Release 2016.3 Sep 27 2016 - 00:23:11 Nand Flash Read Write Example Test Manufacturer: MICRON MT29F32G08ABCDBJ4 , Device Model: MT29F32G08ABCDBJ4 , Jedec ID: 0x2C Bytes Per Page: 0x4000 Spare Bytes Per Page: 0x4C0 Pages Per Block: 0x100 Blocks Per LUN: 0x418 Number of LUNs: 0x1 Number of bits per cell: 0x1 Number of ECC bits: 0xFF Block Size: 0x400000 Number of Target Blocks: 0x418 Number of Target Pages: 0x41800 ECC: addr 0x4220 size 0x2A0 numbits 24 codesz 10 XNandPsu_ReadBbt: Bad block table found Successfully ran Nand Flash Read Write Example Test
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Nandps standalone driver

September 28, 2016, 12:51 am
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Test cases
Nandps example:
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/nandpsu/examples/xnandpsu_example.chttps://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/nandps/examples/xnandps_example.c
It verifies the nand data integrity by programing the known data pattern and verify the same by reading the data back.
In this process erase, program, read, read ID, Read Parameter Page, Reset, read status, get/set features and bbt management are covered
Output:
Xilinx Zynq MP First Stage Boot Loader
Release 2016.3 Sep 27 2016 - 00:23:11Nand Flash Read Write Example Test
Successfully ran Nand Flash
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Example Test Manufacturer: MICRON MT29F32G08ABCDBJ4 , Device Model: MT29F32G08ABCDBJ4 , Jedec ID: 0x2C Bytes Per Page: 0x4000 Spare Bytes Per Page: 0x4C0 Pages Per Block: 0x100 Blocks Per LUN: 0x418 Number of LUNs: 0x1 Number of bits per cell: 0x1 Number of ECC bits: 0xFF
Nandps skip example:
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/nandps/examples/xnandps_skip_example.c
Nand Flash Skip Block Size: 0x400000 Number of Target Blocks: 0x418 Number of Target Pages: 0x41800 ECC: addr 0x4220 size 0x2A0 numbits 24 codesz 10 XNandPsu_ReadBbt: Bad block table found SuccessfullyMethod Example Test
Successfully ran Nand Flash Skip Block Method Example Test
Nandps cache example:
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/nandps/examples/xnandps_cache_example.c
Nand Flash Read Write Example Test
Successfully ran Nand
Related Links
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Nandps standalone driver

September 28, 2016, 12:57 am
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https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/nandps
Driver source code is organized into different folders. Below diagram shows the nandpsu driver source organization
nandpsunandps
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-- Doc - Provides the API and data structure details
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In this process erase, program, read, read ID, Read Parameter Page, Reset, read status, get/set features and bbt management are covered
Output:
Nand<span style="height: 64px; width: 1645px;">Nand Flash Read
Successfully ran Nand Flash Read Write Example Test
</span>
Nandps skip example:
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/nandps/examples/xnandps_skip_example.c
Same as nandps example. In addition to that it will verify the given block is bad or not. if it is bad block it skips that block and proceed with other good block.
Output:
Nand Flash Skip Block Method Example Test
Successfully ran Nand Flash Skip Block Method Example Test
Nandps cache example:
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/nandps/examples/xnandps_cache_example.c
Same as nandps example. In addition to that it will use the page cache read operations.
Output:
Nand Flash Read Write Example Test
Successfully ran Nand Flash Read Write Example Test
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Standalone Device Drivers

September 28, 2016, 1:32 am
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nandps
zynq
http://www.wiki.xilinx.com/Nandps+standalone+driver
Pl330 dma controller
DMA
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Nandps standalone driver

September 28, 2016, 3:56 am
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In this process erase, program, read, read ID, Read Parameter Page, Reset, read status, get/set features and bbt management are covered
Output:
<span style="height: 64px; width: 1645px;">NandNand Flash Read
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Write Example Test
</span>Tes
Nandps skip example:
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/nandps/examples/xnandps_skip_example.c
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Nandps standalone driver

September 28, 2016, 4:05 am
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Support BBT management
Bad Block management
Bad block management implementation is same as Linux MTD bad block management withAs part of the exception of reserving number of blocks to store Bad Block Table (BBT) from defaultbbt management, driver reserves the last 4 blocks to 64 blocks. This is because one of the Micron flash part MT29F32G08ABCDB has last 32 blocks as bad most ofdevice for storing the times. Since it was difficultbbt information. bbt management is similar to store bad block table in last 4 blocks, the numberLinux except the offset of blocks are increased to 64 blocks.storing the BBT signature land version location and also the locations reserved for storing the ecc information.
Known issues and Limitations
Driver supports polled mode only
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Nandps standalone driver

September 28, 2016, 4:31 am
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Features Supported
Controller Features:
Complies with the ONFIONFI 1.0 specification
Supports interleaving operations
Supports BCH error correction code (ECC) data widths of 4, 8, 12, and 24 bits.
All ONFI 3.1 commands
PIO and MDMA support
SDR and NVDDR modes
supports only 8-bit bus support
Hardware ECC (Hamming code and BCH)
Page size up to 16Kcompatible
upto 1GB device
8/16-bit IO width with a single chip select
16-word read/write FIFOs
8-word command FIFO
Programmable IO Cycle timing modes
64-bit dma support.
Supports multiple chip selects (up to 2)
1-bit ECC hardware with sw assist
Asynchronous memory operating mode
Driver Features:
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mandatory ONFI 3.11.0 commands. i.e
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Set/Get Features
Supports SDR/DDR modes
Supports timing modes 0-5
Supports PIO and MDMA support
Support for multiple chip selection
supports page cache read operations
Support BBT management
Support for ondie ecc devices
Bad Block management
As part of the bbt management, driver reserves the last 4 blocks of the flash device for storing the bbt information. bbt management is similar to the Linux except the offset of storing the BBT signature land version location and also the locations reserved for storing the ecc information.
Known issues and Limitations
Driver supports polled mode only
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interleaved and all optional ONFI 3.11.0 commands
Test cases
Nandps example:
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ZynqMp USB Stadalone Driver

September 28, 2016, 11:45 am
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Features Driver support
Supports 5.0 Gbps data rate
SupportSupports device mode only
Supports LPM transfers
Known Issues and Limitations:
Host mode is not supported by standalone driver
Doesn't support hibernation
Can't operate simultaneous USB 3.0/ 2.0 modes, need to restart example before changing modes
Device Mode
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J110 - 1-2
TEST CASES
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tested by importingcompiling xusbpsu_ch9_storage.c , xusbpsu_ch9_storage.h , xusbpsu_ch9.c , xusbpsu_ch9.h , xusbpsu_class_storage.c , xusbpsu_class_storage.h , xusbpsu_intr_example.c file into xsdk
files together
USB 2.0 PHERIPHERAL MODE
The below gives the testing procedure of zynqmp USB standalone example which operates as a mass storage gadget
PERIPHERAL MODE-USB 2.0 PHERIPHERAL MODE-Testing procedureTesting procedure
Import the zynqmp USB example to xsdk project, compile it and generate elf
Download and run the FSBL required
Wait for few seconds for the fsbl to complete exection
Download and run the USB 2.0 example ELF
Debug prints you can see on com port(Teraterm/putty)
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The below gives the testing procedure of zynqmp USB standalone example which operates as a mass storage gadget
PERIPHERAL MODE-USB 2.0 PHERIPHERAL MODE-Testing procedureTesting procedure
Import the zynqmp USB example to xsdk project
For generating USB3.0 mass storage example ELF, please add “XUSBPSU_SUPER_SPEED” in xsdk C/C++ build setting , compile it and generate elf
Set zcu102 bootmode to JTAG
Download and run the FSBL required for zcu102
Wait for few seconds for the fsbl to complete exection
Download and run the USB 3.0 example ELF
Debug prints you can see on com port(Teraterm/putty)
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ZynqMp USB Stadalone Driver

September 28, 2016, 11:49 am
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Supports Link Power Management (LPM) transfers to save power when bus is idle
Features Driver support
Supports 5.0 Gbps data rate
Supports device mode only
Supports LPM transfers
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J110 - 1-2
TEST CASES
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, xusbpsu_intr_example.c
files together
USB 2.0 PHERIPHERAL MODE
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Zynq Standalone USB device driver

September 28, 2016, 11:56 am
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Local DMA Engine.
Features Driver support
Supports 480Mb/s data rate
Support device mode only
Known Issues and Limitations:
Host mode is not supported by standalone driver
OTG mode is not supported by standalone driver
TEST CASES
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tested by importingcompiling xusbps_intr_example.c, xusbps_ch9_storage.cxusbpsu_ch9.c, xusbpsu_ch9.h, xusbps_ch9_storage.c, xusbps_ch9_storage.h ,
xusbps_class_storage.h and xusbps_class_storage.c
https://gitenterprise.xilinx.com/embeddedsw/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/usbps/examples/
USB 2.0 PHERIPHERAL MODE
The below gives the testing procedure of zynq USB standalone example which operates as a mass storage gadget
PERIPHERAL MODE-USB 2.0 PHERIPHERAL MODE-Testing procedureTesting procedure
Import the zynqmp USB example to xsdk project, compile it and generate elf
Download and run the FSBL required
Wait for few seconds for the fsbl to complete exection
DownloadDownload and run the generated USB 2.0 example ELF
Debug prints you can see on com port(Teraterm/putty)
Connect USB cableboard setup to standard host(Windows/Linux)machine USB
You will get pop-up window on Window machine for formatting the size 256MB
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usb device
Known Issues/LimitationsKnown Issues/Limitations {http://confluence.xilinx.com/download/attachments/29212415/image2016-6-1%2015%3A58%3A57.png?version=1&modificationDate=1464776938678&api=v2}
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Zynq Standalone USB device driver

September 28, 2016, 11:57 am
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OTG mode is not supported by standalone driver
TEST CASES
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xusbps_ch9_storage.h ,
xusbps_class_storage.h and xusbps_class_storage.c files found in the below link
https://gitenterprise.xilinx.com/embeddedsw/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/usbps/examples/
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Download and run the generated USB 2.0 example ELF
Connect board setup to standard host(Windows/Linux)machine USB 2.0 port.
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the size 256MB
After256MBAfter format complete
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usb device {http://confluence.xilinx.com/download/attachments/29212415/image2016-6-1%2015%3A58%3A57.png?version=1&modificationDate=1464776938678&api=v2}
{http://confluence.xilinx.com/download/attachments/29212415/image2016-6-1%2015%3A58%3A57.png?version=1&modificationDate=1464776938678&api=v2}
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ZynqMp USB Stadalone Driver

September 28, 2016, 12:01 pm
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The below gives the testing procedure of zynqmp USB standalone example which operates as a mass storage gadget
PERIPHERAL MODE-USB 2.0 PHERIPHERAL MODE-Testing procedureTesting procedure
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run the generated USB 2.0 example ELF on board
Debug prints you can see on com port(Teraterm/putty)
the below prints should be seen on com port
{Capture_temp.PNG}
Connect USB cableboard to standard host(Windows/Linux)machine USB
You will get pop-up window on Window machine for formatting the size 256MB
After format complete you can copy file to usb device
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PERIPHERAL MODE-USB 2.0 PHERIPHERAL MODE-Testing procedureTesting procedure
For generating USB3.0 mass storage example ELF, please add “XUSBPSU_SUPER_SPEED” in xsdk C/C++ build setting , compile it and generate elf
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run the generated USB 3.0 example ELF on board
Debug prints you can see on com port(Teraterm/putty)
the below prints should be seen on com port
{Capture_temp.PNG}
Connect USB cableboard to standard host(Windows/Linux)machine USB
You will get pop-up window on Window machine for formatting the size 256MB
After format complete you can copy file to usb device
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GIC Standalone driver

September 29, 2016, 11:42 pm
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Features Supported:
Controller/Driver features supported
- Enabling,Registers for managing interrupt sources, interrupt behavior, and interrupt routing to one or more processors
Enabling, disabling, and
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interrupt sources
- Support
Support for interruptsfollowing type of interrupts,
Software generated interrupts (SGIs)
Shared-peripheral interrupts (SPIs)
Interrupt masking and prioritization
- ProgrammableProgrammable interrupts that
Interrupt sensitivity for an interrupt
Targeting of an interrupt
Handling of interrupt
Distributor and CPU interfaces
Known issues and Limitations
Test cases
...
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scugic/examples/xscugic_example.c
This example evaluates triggering of interrupts by simulating software generated interrupt.
Expected OutputOutput
GIC Example Test
Successfully ran GIC example Test
Scugic low level example:
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scugic/examples/xscugic_low_level_example.c
This is an interrupt example which utilizes low level APIs to configure the interrupt
Output
Low Level GIC Example Test
Successfully ran Low Level GIC example Test
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Zynq UltraScalePlus MPSoC - Power Advantage Tool with Ubuntu Desktop

September 29, 2016, 11:42 pm
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Files Provided
20160929_zcu102_ubuntu.zip
Archived projects:
Containfile
contain the following
sd: This folder contains the Ubuntu Desktop Images file for the SD card to boot in SD boot mode
ZynqUS_Demos: This folder contains the Power Advnatage Tool Host PC files including the GUI and automated scripts
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GIC Standalone driver

September 29, 2016, 11:44 pm
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Introduction:Introduction
This page gives an overview of scugic driver which is available as part of the Xilinx Vivado and SDK distribution.
Source path for the driver:
...
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- Source - Driver source files
Features Supported:Supported
Controller/Driver features supported
Registers for managing interrupt sources, interrupt behavior, and interrupt routing to one or more processors
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Known issues and Limitations
Test cases
...
cases--Nandpsu example:Scugic example:example
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scugic/examples/xscugic_example.c
This example evaluates triggering of interrupts by simulating software generated interrupt.
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GIC Example Test
Successfully ran GIC example Test
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low level example:example
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scugic/examples/xscugic_low_level_example.c
This is an interrupt example which utilizes low level APIs to configure the interrupt
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GIC Standalone driver

September 29, 2016, 11:46 pm
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GIC Standalone driver

September 29, 2016, 11:48 pm
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uart.PNG

September 29, 2016, 11:50 pm
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