Run petalinux-create command on the console
petalinux-create -t project -s <path-to-bsp>
bash> cd
$PETALINUX$XAPP_HOME\xapp1305-ps-pl-based-ethernet-solution
// for PS emio
project -s
$XAPP_HOME\xapp1305_v1.0\software\bsps\PS + PL Ethernet 1G\xilinx-zcu102-2016.4-ps-emio.bspsoftware\bsps\xapp1305_ps_pl_eth_1g\xilinx-zcu102-2016.4-ps-emio.bsp
//for PS MIO
project -s
$XAPP_HOME\xapp1305_v1.0\software\bsps\PS Ethernet\xilinx-zcu102-2016.4-ps-mio.bspsoftware\bsps\xapp1305_ps_eth_1g\xilinx-zcu102-2016.4-ps-mio.bsp
2.3.1.2 Configure PetaLinux
// for PS emio
bash> mv xilinx-zcu102-2016.4-ps-emio.bsp xapp1305_ps_emio_eth
bash> cd xapp1305_ps_emio_eth
//for PS mio
bash> mv xilinx-zcu102-2016.4-ps-mio.bsp xapp1305_ps_mio_eth
bash> cd xapp1305_ps_mio_eth
bash> petalinux-config
Add fsbl_patch here which configure clock and SFP.
Open fsbl_%.bbapend file from <proj dir>\project-spec\meta-user\recipes-fsbl\fsbl and add below line to it.
SRC_URI +=
"file://0001-fsbl-si570-clk-156MHz.patch""file://0001-fsbl-si570-clk.patch"
Bitbake will add this patch to FSBL before compilation.
Please refer Appendix A for more details about applying patch in fsbl.
bash> cd images/linux
// for PS emio
--boot --fsbl=zynq_fsbl.elf
--fpga=$PETALINUX/xapp1305_ps_emio_eth/images/linux/ps_emio_eth_1g_wrapper.bit--fpga=ps_emio_eth_1g_wrapper.bit --u-boot
//for PS mio
--boot --fsbl=zynq_fsbl.elf
--fpga=$PETALINUX/xapp1305_ps_emio_eth/images/linux/ps_emio_eth_1g_wrapper.bit--fpga=ps_emio_eth_1g_wrapper.bit --u-boot
2.3.1.7 SD Images
SDcard Deployable binaries:-
Run petalinux-create command on the command console:
petalinux-create -t project -s <path-to-bsp>
bash> cd
$PETALINUX$XAPP_HOME/xapp1305-ps-pl-based-ethernet-solution
bash> petalinux-create project -s
$XAPP_HOME/xapp1305_v1.0\software\bsps\PL Ethernet 1G\xilinx-zcu102-2016.4-pl_eth.bspsoftware\bsps\pl_eth_1g\xilinx-zcu102-2016.4-pl_eth.bsp
2.4.1.2 Configure petalinux
bash>
mv xilinx-zcu102-2016.4 xapp1305_pl_eth_1g
bash> cd
xapp1305_pl_ethxapp1305_pl_eth_1g
bash> petalinux-config
Set one of local directory as tmp directory, Save the changes and exit.
Add fsbl_patch here which configure clock and SFP.
Open fsbl_%.bbapend file from <proj dir>\project-spec\meta-user\recipes-fsbl\fsbl and add below line to it.
SRC_URI +=
"file://0001-fsbl-si570-clk-156MHz.patch""file://0001-fsbl-si570-clk.patch"
Bitbake will add this patch to FSBL before compilation.
Please refer Appendix A for more details about applying patch in fsbl.
2.4.1.6 Create Zynq-mp Boot image (BOOT.bin)
bash> cd images/linux
--boot --fsbl=zynq_fsbl.elf
--fpga=$PETALINUX/xapp1305_pl_eth/images/linux/pl_eth_1g_wrapper.bit--fpga=pl_eth_1g_wrapper.bit --u-boot
2.4.1.7 SD Images
SD Deployable binaries:-
Run petalinux-create command on the command console:
petalinux-create -t project -s <path-to-bsp>
bash> cd
$PETALINUX$XAPP_HOME/xapp1305-ps-pl-based-ethernet-solution
bash> petalinux-create project -s
$XAPP_HOME/xapp1305_v1.0/software/bsps/PLsoftware/bsps/PL Ethernet 10G/xilinx-zcu102-2016.4-pl-10g.bsp
2.4.2.2 Configure petalinux
bash> mv xilinx-zcu102-2016.4 xapp1305_pl_eth_10g
bash> cd xapp1305_pl_eth_10g
bash> petalinux-config
Add fsbl_patch here which configure clock and SFP.
Open fsbl_%.bbapend file from <proj dir>\project-spec\meta-user\recipes-fsbl\fsbl and add below line to it.
SRC_URI +=
"file://0001-fsbl-si570-clk-156MHz.patch""file://0001-fsbl-si570-clk.patch"
Bitbake will add this patch to FSBL before compilation.
Please refer Appendix A for more details about applying patch in fsbl.
2.4.2.6 Create Zynq-mp Boot image (BOOT.bin)
bash> cd images/linux
--boot --fsbl=zynq_fsbl.elf
--fpga=$PETALINUX/xapp1305_pl_eth_10g/images/linux/pl_eth_10g_wrapper.bit--fpga=pl_eth_10g_wrapper.bit --u-boot
2.4.2.7 SD Images
SD Deployable binaries:-
How to patch Device Tree in petalinux2016.4:
SRC_URI += "file://0001-fsbl-si570-clk-156MHz.patch"
$XAPP_HOME/xapp1305-ps-pl-ethernet-based-solution